1. Field of the Invention
The present invention relates to a computer system for inputting/outputting data between the main memory and an external device, and more specifically to a computer system having improved capabilities of inputting/outputting data to an external device connected to another processing device in a parallel computer system in which a plurality of processing devices are interconnected over a network.
2. Description of the Related Art
As large-scale general-purpose computers performing processes serially are reaching the limits of process speed both in hardware technology and logical method, there is an increasing demand for parallel computer systems for performing parallel processes using a plurality of processing elements (hereinafter referred to as cells). Particularly, simulation in scientific technologies (aeromechanics, molecular chemistry, weather analysis, etc.) requires a large amount of calculations to secure the reliability and precision of a solution, etc., and the parallel computers are strongly demanded to shorten the time taken for necessary calculations.
There is, as a form of these parallel computers, a well-known system comprising cells provided with I/O devices such as external magnetic disk storage devices (hereinafter referred to as I/O cells) and cells not provided with those I/O devices (hereinafter referred to as non-I/O cells.
In such a system, a file is generated in an external storage device of an I/O cell and shared by another cell. When writing and reading data from and to the file, a non-I/O cell need access to the I/O cell having the file.
An input/output (I/O) instruction process to access the cell, etc. is performed normally using an I/O instruction packet. In this case, the I/O instruction packet is transmitted from a non-I/O cell to an I/O cell over a network in which they are interconnected.
Upon receipt of the I/O instruction packet, the I/O cell analyzes the contents of the packet, performs a specified process, and returns the process result to the requesting cell through an answer packet. If a reading process is specified, specified data is transmitted from the answer packet to the requesting cell. Since a large amount of data is normally transmitted by the I/O instruction between cells, the received data is not temporarily stored in a buffer in an interface provided between a process device and the network, but directly written to a memory accessible by the process device in order to reduce communications overhead and improve the throughput of the system. That is, with the buffer, data can be copied frequently between the buffer and the memory, thereby requiring a lot of overhead.
Conventionally, in the method in which received data is directly written in a memory, the interface uses a read instruction, for example, to notify the process device of an interruption after all specified data have been stored in a specified area of the memory. Upon receipt of the interruption, the process device reads the received device from the specified area in the memory, performs a corresponding process, reads the specified data from the file of its cell, and transmits the data to the I/O cell through the answer packet.
Assume that data is read from an I/O cell according to a read instruction with the above described configuration in a massively parallel processor. In this case, the throughput of the system can be much more improved by generating an answer packet each time a predetermined length of data is read from the cell according to a read instruction to the I/O cell to send all data to the requesting cell after putting them separately in a plurality of answer packets than by sending all data in a single answer packet to the requesting cell after reading the data requested according to the instruction. That is, in the former method, a task operating in a processing device reads and processes data sequentially from a specified memory area, and concurrently receives the data.
Likewise, when the I/O cell receives a write instruction, the task of the requesting cell can sequentially access an area in a specified memory to which data has been transferred, and the operation of the task and the transmission of data can be concurrently performed.
FIG. 1 shows the data read operation in which a non-I/O cell sends a read instruction to an I/O cell by the divisional packet method in a conventional massively parallel processor system.
In FIG. 1, a cell 10 is a non-I/O cell, but is provided with a processing device. It is connected to an I/O cell provided with a file server 32 over a network comprising a torus network 20. The file server 32 provides the cell 10 with the file access function if the I/O instruction received from the cell 10 is a file read/write instruction. The I/O cell 30 is connected to a disk device 34 (magnetic disk device) in which a file 36 is generated.
With the above described configuration, the cell 10 sends an I/O instruction packet 42 for a reading operation to the I/O cell 30 if data is to be read from the file 36. Upon receipt of an I/O instruction packet 42, the file server 32 of the I/O cell 30 sequentially reads specified data from the file 36, sequentially generates data packets 52, 53, and 54, and transmits them to the cell 10 over the torus network 20.
FIG. 2 shows the process of the cell 10 in the above described operation.
(a) First, a user task of the cell 10 opens a file to be accessed according to an open instruction and receives an identifier fd of the file from the file server 32. Then, it specifies the file identifier fd by a parameter and issues a read instruction. Thus, the I/O instruction packet 42 for a reading operation is transmitted to the I/O cell 30 over the torus network 20. PA1 (b) The user task continues its operation on processes which can be performed regardless of the completion of the reading operation. PA1 (c) If a process is to be performed using the data required in the reading operation, a wait instruction is issued to receive a data packet. PA1 (d) If the data packet 52 arrives at the cell 10 and the processing device of the cell 10 is informed of an interruption, then the processing device starts the interrupting process and writes the data received through the data packet 52 to an area 14. PA1 (e) The user task of the cell 10 reads data from the area 14 of the memory 12 and performs the processes requiring the data. When the subsequent data is required, the wait instruction is issued and the subsequent data packet 53 is expected as in (c). Upon arrival of the data packet 53, the data stored in the packet 53 is processed as in (d) and (e). If the last data packet 54 arrives and the data stored in the packet 54 is completed, the process of data required in the reading operation is completed through the I/O instruction packet 42. The data received through the data packets 53 and 54 is stored in the areas 16 and 18 through the interrupting process.
Conventionally, when the cell 10 receives an answer packet such as the above described data packets from an I/O cell, it interrupts the processing device and informs the processing device of the reception of the answer packet. The processing device is required to process the data stored in the answer packet. Thus, the interrupting process is overhead to the processing device, and the cell 10 has less opportunities to concurrently perform operations of user tasks and I/O processes, thereby reducing the throughput of the entire system.